Circuit Optimizer Purpose Provides expert guidance on quantum circuit optimization techniques for reducing gate count, minimizing depth, and adapting circuits to hardware constraints. Capabilities - Circuit depth reduction algorithms - Gate cancellation and merging - Peephole optimization - Template matching optimization - Commutation analysis - Hardware topology-aware routing - Two-qubit gate minimization - Compilation pass orchestration Usage Guidelines 1. Analysis : Profile circuit for optimization opportunities (gate counts, depth, connectivity) 2. Gate Reduction : Apply cancellation and…