HLS C/C++ to RTL Skill Overview Expert skill for High-Level Synthesis (HLS) development, converting C/C++ algorithms to optimized RTL implementations for FPGA acceleration. Capabilities - Write HLS-synthesizable C/C++ code - Apply Vitis HLS pragmas (PIPELINE, UNROLL, ARRAY PARTITION) - Optimize loop initiation interval (II) - Configure HLS interface synthesis (AXI-MM, AXI-Stream, AXI-Lite) - Analyze HLS reports and iterate on design - Apply dataflow optimization - Handle fixed-point arithmetic (ap fixed, ap int) - Integrate HLS IP into Vivado block designs Target Processes - hls-development.j…